In a computer network, such as an Ethernet network, a computer device often utilizes a transceiver to transmit and receive signals with another computer device. An Ethernet transceiver, for example, typically includes a media access controller (MAC) that interfaces with applications running on the computer. In addition, such Ethernet transceivers typically also include a physical layer device, often referred to as a “PHY,” that interfaces between the media access controller and a physical link media, such as a copper or fiber link. Generally, in a receive mode, physical layer devices receive data from the medium and decode the data into a form appropriate for the receiving device. Similarly, in a transmit mode, physical layer devices obtain data from the transmitting device, typically from the media access controller, and convert the data into a media-appropriate form.
As semiconductor technologies go to finer geometries, a greater amount of integration occurs in the Ethernet switch and the PHY technology. Octal Gigabit Ethernet PHYs and single chip 48-port switches, for example, are currently the leading edge of this development. A large number of pins are currently required on an Ethernet switch to interface with the physical layer device. A Serial Gigabit Media Independent Interface (SGMII) format is often used to interface between multi-port physical layer devices and Ethernet switches in order to transmit Ethernet data frames between devices. SGMII is a serialization of the GMII interface defined in the IEEE 802.3-2002 standard SGMII specifies the transmission of Ethernet data flames using well-known 8B/10B encoding techniques. Control information can be transmitted in an out-of-band control channel between the devices. Current implementations of the SGMII format require over 300 pins and up to 7.2 Watts of system power for the interface between a 48-port the Ethernet switch and the physical layer devices In addition, a significant amount of die area is required for the I/O circuits and buffers and printed circuit board area is also required to route these signals. These signals often have to be touted over back planes adding further expense.
A need therefore exists for an SGMII interface that reduces the pin count and system power